ELEC 5200-001/6200-001 Computer Architecture and Design
Fall 2008, MWF 11AM, Broun 306
Course Syllabus
Grades
Statistics
Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE
Teaching Assistant: Manish Kulkarni, 334-332-0556, B359,
consulting hours: MWF 10:00-11:00AM.
EXAM SCHEDULE:
Test 1, Friday, 9/19/08, 11:00-11:50AM, Broun 306, use of books, notes, etc., permitted,
statistic.
Test 2, Monday, 11/17/08, 11:00-11:50AM, Broun 306, use of books, notes, etc., permitted,
statistic.
Final Exam, Tuesday, 12/16/08, 12:00-2:30PM, Broun 306, use of books, notes, etc., permitted - to prepare, review material on performance and cache,
statistic.
PROJECT:
Project feedback from Fall 2008 (this semester) students:
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Project feedback from Spring 2008 students:
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Project feedback from Fall 2007 students:
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Fall 2008 Assignment:
Part 1 ISA, assigned 10/20/08, report due 11/3/08
Part 2 Datapath, assigned 11/03/08, report due 11/10/08
Part 3 - Datapath Verification, assigned 11/10/08, report due 11/19/08
Part 4 - Control Unit, assigned 11/10/08, report due 12/1/08
Part 5 - FPGA Implementation, demo and report, completed 12/5/08
INSTRUCTIONS FOR DEMO:
1. Briefly describe what is implemented, what program you will run and what result is expected.
2. Run the program pointing to the functions of the buttons you press. Let the viewer examine the result.
3. Offer to make a change to some parameter to a viewer selected value and rerun the demo.
4. Total duration of demo: FIVE MINUTES.
VHDL References:
Slides from Prof. Nelson's site: Synthesis with VHDL and Leonardo
Lectures from Prof. Nelson's CAD course
Altera Quartus II and DE2 Manual
Leonardo Spectrum for Altera HDL Synthesis Manual
Altera MegaWizard Plug-In Manager Manual
RAM_init.mif, Memory initialization file
CLASS PRESENTATIONS (Attendance is a must for satisfactory grade):
10/10/08 Hung Nguyen: Multiprocessors
slides
10/10/08 Muralidharan Venkatasubramanian: Razor: A Low-Power Processor Design
slides
10/10/08 Colin Stevens: Instruction Level Parallelism
slides
10/29/08 Ramesh Bokka: CISC - Complex Instruction Set Computers
slides
10/29/08 Pradeep Dandamudi: Single-Chip Multi-Processors (CMP)
slides
10/29/08 Ahmed Faraz: Superscalar Architecture
slides
10/31/08 Balapradeep Gadamsetti: Intel's Low-Power (High-k Dielectric) Technology
slides
10/31/08 Chao Han: PowerPC
slides
10/31/08 Joel Hewlett: IBM360 and Tomasulo's Algorithm
slides
11/03/08 Prardiva Mangilipally: ARM Processor Cores
slides
11/03/08 Kautilya Mishra: Virtual Memory
slides
11/03/08 Priyadarshini Shanmugasundaram: Supercomputers
slides
11/05/08 Rakshith Venkatesh: RAID-Redundant Arrays of Inexpensive Arrays
slides
11/05/08 Chandra Shekar Yerrabothu: Input and Output of a Processor
slides
11/05/08 Yu Zhang: Performance and Power Benchmarks
slides
HOMEWORKS:
Homework 1, assigned 8/25/08, due 9/3/08.
Homework 2, assigned 9/5/08, due 9/12/08.
Homeworks 3 and 4: FPGA Exercise, assigned 9/15/08, due 9/29/08
Following files will be used (also see VHDL and Altera documents under PROJECT):
SRAM tutorial
Writing to SRAM
DE2 pin assignments
DE2 User Manual
sramtest.vhd
hexto7seg1.vhd
hexto7seg2.vhd
hexto7seg3.vhd
hexto7seg4.vhd
Homework 5, assigned 9/29/08, due 10/6/08.
Homework 6, assigned 10/6/08, due 10/13/08.
Homework 7, assigned 11/21/08, due 12/1/08.
Homework 8, assigned 11/21/08, due 12/1/08.
Homework 9, assigned 12/1/08, due 12/8/08.
LECTURES: See webpages of most recent years.
PREVIOUS OFFERINGS BY PROF. V. AGRAWAL:
Spring 2008
Fall 2007
Spring 2007
Fall 2006
Fall 2005
Fall 2004