Sanjeev Baskiyar   

Associate Professor

3127C Shelby Technology Center

Dept. of Computer Science & Software Eng.

345 Magnolia Ave

Auburn University, Auburn, AL 36849

Voice: (334)-844-6306

 Fax (334)-844-6329

<mylastname><at>eng<dot>auburn<dot>edu

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Sanjeev Baskiyar received the PhD and MSEE degrees (major: Electrical (Computer) Engineering, minor: Computer Science) from the University of Minnesota, Twin Cities (Minneapolis), in 1993 and 1988 respectively and the BE (Electronics and Communications) degree from the Indian Institute of Science, Bangalore in 1984.  He received the BS degree in Physics with honors and distinction in Mathematics in 1981.  He was a recipient of several competitive national and state-merit scholarships.  His academic record has been in the top decile.  He was nominated for the Best Teaching Assistant of the Year award in the ECE dept. at the University of Minnesota, Minneapolis.  He has taught courses in the areas of Real-time and Embedded Computing, Computer Architecture, Operating Systems, Microprocessor Programming and Interfacing and VLSI Design.   His experience includes working as an Assistant Professor at Western Michigan University, as a Senior Software Engineer in Unisys Corporation, and Computer Engineer in Tata Motors, India.   Dr. Baskiyar’s research has been supported by grants from the National Science Foundation, DARPA/AFRL, NASA/MSGC, Wind-River Systems and Mentor Graphics.  He is currently Associate Professor (with tenure) in the department of Computer Science and Software Engineering at Auburn University. 


Specialty Areas

Scheduling, Real-time and Embedded Computing, Storage, Computer Architecture, Distributed Computing, STEM education. 


 

Research Projects

I am currently offering scholarships supported by NSF for US citizens and Permanent Residents.  For information and application on these scholarships, please e-mail me.

1.    Resource and energy aware scheduling: This goal of this project is to develop and evaluate schedules for embedded systems, multi-core computers, clusters and grids.  The target is to develop adaptable and scalable schedules that are resource aware (memory, computational power) as well as energy and thermal conscious.  

2.    Real-time micro-architecture:  This project investigates the use of secondary bus between cache and memory to develop better micro-architectures.    It also investigates the use of wireless technology to develop better fault tolerance and cache coherence techniques.  It involves performance analysis and hardware design.

3.    Storage architecture:  This project investigates novel data and meta-data organization within disks, disk-clusters and flash drives for better timing, energy, fault tolerance and wear.  

4.    Education: This project involves development of concept graphs and cartoon strips for computer science education.

Funding Sources

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Recent Students, Degree/Employment

1.    Chen Zhang, MS, Software Engineer, Wells Fargo, NY, NY

2.    Meghanathan Natarajan, MS; UT, Dallas Assistant Professor; Associate; Full Professor, Jackson State Univ., MS

3.    Arun Kannan, MS, Mentor Graphics, FL

4.    Kiran Palli, MS, Intel Corporation, CA

5.    C. S. Prashanth,  PhD, Asst. Professor, Bangalore, India

6.    Rabab Abdel-Kader, PhD, Assistant Professor, Suez Canal University, Egypt

7.    Chiao Huang, Taiwan Energy, Taiwan.

8.    Rakshith Venkatesh, Oracle, CA

9.    Cong Liu, MS, ->PhD, Univ. of NC, Chapel Hill ->Assistant Professor, Univ. of TX, Dallas.

10.Yong-won Park, MS, PhD student, Auburn University.

11.Christopher Dickinson, MS, Entergy.

12.Sudhakar Jonnalgadda, Oracle, CA.

13.Ahmed Owian, BS (Honors thesis)->MS Univ. of Memphis, Sr. Programmer/Analyst, FedEx,Memphis.

14.Sreekanth Boga, MS, Embedded Systems Engineer, Qualcomm, CA.

15.Yong-Won Park, PhD, Managing Researcher, Samsung S1   (Security)

16.Karthik Vemula, MS, InfoTech, Gainesville, FL. 

17.Chengjun Wang, PhD, Assistant Professor, Vermont Tech, VT.

18.John O’Farrell, PhD, Science Applications International Corporation (SAIC), Huntsville, AL.

19.Adarsh Jain, MS, VmWare, Atlanta, GA.

20.Swathi Bathula, Intel Corporation, Oregon. 

21.Sankari S. Anupindi, PhD, Blackhawk Networks, Phoenix, AZ.

22.Pavan Ravi Teja-Uppu, MS

23.Sameul Haque, MS,

 

Research Milestones

1.    Design and evaluation of an efficient novel proactive thermal aware CPU scheduling

2.    Design and evaluation of an interface to flash to merge writes that double its lifetime. 

3.    Design and evaluation of a disk-cache partition to determine the best split

4.    First use and evaluation of Support Vector machine to schedule tasks on clusters/grids.

5.    Proposal of an intra-body network for medical uses

6.    Proposal and proof of an optimal energy efficient rate monotonic algorithm

7.    Design and evaluation of path from write-back buffer to main memory, which significantly enhances processor real-time performance. 

8.    Design of intra-chip wireless communication to enhance computer architectures.

9.    Identification and proof NP-completeness of the fundamental task in-tree scheduling problem on completely connected multiprocessors

10.Design and development of optimal schedules on a very wide set of restricted task in-trees on multiprocessors

11.Definition of the object-invocation graph in program decomposition and partitioning on multiprocessors for efficient execution

12.Design and development of an O(n3p) heuristic yielding optimal/very near-optimal schedule lengths for thousands of random and benchmark directed a-cyclic task graphs on homogeneous multiprocessors

13.Design and development of one of the fastest dynamic method resolution techniques for pure object-oriented programs that is usable for reentrant programs

14.Development of scheduling libraries

15.Development of windows based interactive complete Smith Chart


Selected Refereed Full Length Papers in Refereed Journals & Conferences

(Penultimate versions of a few papers are being placed here for timely research dissemination.  The copyright rests with the publisher)

Link to my Google Scholar Citations page

(A * next to the name refers to graduate student supervised)

1.    Y.w. Park and S. Baskiyar, Adaptive Scheduling in heterogeneous systems using Support Vector Machines, Computing, Springer, DOI 10.1007/s00607-016-0513-x,  2016.  PDF

2.    S. Baskiyar, C.-C. Huang*, and T.-Y. Tam, “Minimum energy consumption for rate monotonic scheduled tasks,” Computing, Springer, 2015 (24 pages) DOI 10.1007/s00607-015-0475-4. PDF

3.    J. W. O’Farrell and S. Baskiyar, “Enhanced real-time performance using a secondary bus for cache write-backs, International Journal of Computers and Applications,” Vol. 37, issue 1, pp 1-9, January 2015, Taylor and Francis.  

4.    C. Wang and S. Baskiyar, “Extending flash lifetime in secondary storage,” Microprocessors and Microsystems, pp. 167-180, vol. 39, Elsevier, 2015. PDF

5.    N. Meghnathan* and S. Baskiyar, “Design and Development of a Ticket Based Scheduling and Load Sharing Algorithm for Optimal Usage in Mobile Computing Environments,” International Journal of Security, Privacy and Trust Management, vol. 1, no. 1, pp. 1-17, Feb 2012.  PDF

6.    J. W. O'Farrell*, R. T. Venkatesh*, S Baskiyar, “Secondary Bus Performance in Retiring Cache Write-Backs to Memory,” ISCIS, pp 463-469, London, UK, 2011.   

7.    Baskiyar, S. and Abdel-Kader, R*, “Energy Aware DAG Scheduling on heterogeneous systems,” Cluster Computing, vol 13, no. 4, pp 373-383, Springer, 2010. PDF

8.    O’Farrell, J.* and Baskiyar, S., “Improved Real-Time Performance Using a Secondary Bus,” Proceedings of the Computers And Their Applications,” Honolulu, HI, March 2010, ISCA Press.

9.    Park, Y.-w*, Casey, K* and Baskiyar, S.*, “A novel adaptive instance based learning approach to task scheduling,” Proceedings of the 9th International PDCN, pp. 32-36, Feb 2010, Innsbruck, Austria, IASTED Press.

10.Baskiyar, S. and Wang, C*, “A split disk cache architecture to reduce read miss ratio,” Proceedings of the 9th International PDCN, Feb 2010, Innsbruck, Austria, pp. 249-254, IASTED Press.

11.Liu, C.* and Baskiyar, S. “A General Distributed Scalable Grid Scheduler for Independent Tasks,” Journal of Parallel and Distributed Computing, vol. 69, no. 3, pp. 307-314, March 2009. PDF

12.Liu, C.* and Baskiyar, S., “A Scalable Grid Scheduler for Real-Time Applications,” International Journal of Computers and Their Applications, vol. 16, no 1, pp. 34-42, 2009.

13.Liu, C.* and Baskiyar, S., “Scheduling Mixed Real-Time Tasks in Grids using Bin Packing,” Proceedings of the 14th IEEE International Conference on Parallel and Distributed Systems (ICPADS), pp 229-236, IEEE Computer Society,  Dec. 2008. 

14.Liu, C.*, Qin, X., Kulkarni, S.*, Wang C.J.*, Manzanares A., Li S.*, and Baskiyar, S., Distributed Energy Efficient Scheduling for Real-Time Data-intensive Applications, Proceedings of the 27th IEEE International Performance Computing and Communications Conference (IPCCC), Dec. 2008

15.Soares, C., Page, G., MacDonald, J., Baskiyar, S., Hamilton, J., and Dozier, G., “Bowl championship series vulnerability analysis,” Proceedings of TAPIA Diversity in Computing, pp 1-4, Orlando, Florida, October 2007.

16.Liu, C*, Baskiyar, S. and Li, S.*, “A General Distributed Scalable Peer to Peer Scheduler for Mixed Tasks in Grids,”   Lecture Notes on Computer Science, vol. 4873, pp. 320-330, Springer, 2007.

17.Baskiyar, S. and SaiRanga, P.*, “Scheduling DAGs on heterogeneous network of workstations to minimize finish time,” International Journal of Computers and Their Applications, vol. 13, no 4, Dec 2006.

18.Baskiyar, S. and Palli, K.K.*, Low-power scheduling of DAGs to minimize finish time, Lecture Notes in Computer Science, pp. 353 -362, 2006.

19.Abdel-Kader, R.* and Baskiyar, S., “Power managed task scheduling on heterogeneous systems,” Proc. of International Conference on Parallel and Distributed Computing, ISCA, 2006.

20.Cong, L.*, Baskiyar, S. and Wang, C.J.*, “A distributed peer to peer grid scheduler,” Proceedings of the International Conference on Parallel and Distributed Computing and Systems, IASTED, Nov. 2006.

21.SaiRanga, P.* and Baskiyar, S., “A low complexity algorithm for dynamic scheduling of independent tasks onto heterogeneous computing systems,” 43rd ACM SE conference, Kennesaw, GA, March 2005.

22.Baskiyar, S. and Dickinson, C.*, “Scheduling directed a-cyclic task graphs on a bounded set of heterogeneous processors using task duplication,” Journal of Parallel and Distributed Computing, vol. 8, no 65, pp 911-921, Elsevier, 2005.   PDF

23.Baskiyar, S. and Meghanathan, N.*, “A survey of contemporary real-time operating systems,” Informatica, vol. 29, no. 2, pp 233-240, 2005.  PDF

24.Baskiyar, S. and SaiRanga, P.C.*, “Scheduling directed a-cyclic graphs on heterogeneous computing systems, Workshop on CRTPC in Proc.  32nd International Conference on Parallel Processing, 2003.

25.Baskiyar, S. and SaiRanga, P. C.*, “Scheduling DAGs on heterogeneous network of workstations to minimize finish time,” Proc. ISCA 16th International Parallel and Distributed Computing Symposium, pp. 30-35, 2003.

26.Baskiyar, S. and Meghanathan, N.*, “Binary codes for fast determination of ancestor-descendant relationship in trees and directed a-cyclic graphs,” International Journal of Computers and Their Applications, vol. 10, no. 3, pp. 67-71, 2003.  PDF

27.Baskiyar, S., A computer based educational Smith Chart,” Computers in Education Journal, ASEE, vol. 13, no. 3, pp 76-80, 2003.  PDF

28.Baskiyar, S. and Dickinson, C.*, “Scheduling directed a-cyclic task graphs on heterogeneous processors using task duplication,” LNCS, vol. 2913, pp. 259-267, Springer, 2003.

29.Baskiyar, S., “Efficient execution of pure object-oriented programs by follow-up compilation,” Computing, Springer, vol 69, no. 10, pp. 273-289, 2002.  (This article received separate favorable reviews in the publication ACM Computing Reviews). PDF

30.Baskiyar, S., “A real-time fault tolerant intra-body network,” Proc. 27th International LCN, pp 235-240, 2002, Tampa, FL, IEEE-ACM Press.  PDF

31.Baskiyar, S., “A survey on real-time operating systems,” Proc. IASTED-NPDA, 2002, Tsukuba, Japan, Acta Press.

32.Baskiyar, S., “A software simulation of DNA computing,” Proc. 15th PDCS, 2002, pp 373-378, Louisville, KY, ISCA.

33.Baskiyar, S., “Simulating DNA computing,” Lecture-Notes in Computer Science, v. 2552, pp. 411-419, Springer, 2002. 

34.Baskiyar, S., “Scheduling task in-trees on distributed memory systems,” Proc. 15th IPDPS, San Francisco, CA, 2001 (IEEE-ACM).

35.Baskiyar, S., “Minimizing makespan of task in-trees,” IEICE Transactions on Information and Systems, Oxford Univ. Press, vol. E 84-D, no. 6,  pp. 685-691, 2001.  PDF

36.Baskiyar, S. and Meghanathan, N.*, “Scheduling and load sharing in mobile computing using tickets,” Proc. 39th SE-ACM Conference, Athens, GA, 2001.  PDF

37.Baskiyar, S., “Speeding Smalltalk programs using follow-up compilation,” Proc. EIT Conf, Chicago, 2000, IEEE.

38.Baskiyar, S., “Scheduling DAGs on message passing m-processors systems,” IEICE Transactions on Information and Systems, vol. E-83-D, no. 7, pp. 1497-1507, Oxford Univ. Press, 2000.  PDF

39.Baskiyar, S. and Kain, R.Y., “Smith chart with GUI,” Proc. NC-ASEE Conf., Erie, 1999.

40.Baskiyar, S. and Kain, R. Y., “On the complexity of scheduling task trees on multiprocessors to minimize makespan,” Japan Society of Artificial Intelligence, vol. SIG-PP-93, 1993. 

41.Baskiyar, S. and Kain, R. Y., “Architectural support for enhancing object­-oriented program execution times,” Proc. OOS, Jan. 1993, San Diego, CA.

42.Baskiyar, S. and Kain, R. Y., “On the complexity of scheduling task trees on multiprocessors to minimize makespan,” Proc. JSPP, Tokyo, Japan, 1993.

43.Poster--Liu, C.*, Baskiyar, S., P2PGS: A Distributed Grid Scheduler Adopting P2P Resource Discovery Strategy, Vodafone-U.S. Foundation Fellows Symposium (Poster Paper), Auburn, AL, Mar. 2007


Teaching

Spring 2016

      COMP 3350 – Computer Organization and Assembly Programming

Fall 2015

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 4300 – Computer Architecture

Spring 2015

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2014

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 7300/7306 – Advanced Computer Architecture

Spring 2014

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2013

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 4300 – Computer Architecture

Spring 2013

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2012

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 7300/7306 – Advanced Computer Architecture

Spring 2012

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2011

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 7300/7306 – Advanced Computer Architecture

Spring 2011

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2010

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 7300/7306 – Advanced Computer Architecture

Spring 2010

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2009

         COMP 3350 – Computer Organization and Assembly Programming

Spring 2009

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 3700 – Software Modeling and Design

Spring 2008

         COMP 3350 – Computer Organization and Assembly Programming

Fall 2007

         COMP 4300 - Computer Architecture

         COMP 3350 – Computer Organization and Assembly Programming

Spring 2007

         COMP 3350 – Computer Organization and Assembly Programming

         COMP 5720/6720—Real-time and Embedded Computing

Fall 2006

         COMP 4300 - Computer Architecture

         COMP 3350 – Computer Organization and Assembly Programming

Spring 2006

         COMP 4300 - Computer Architecture

         COMP 8970 – Real-time and Embedded Computing

Fall 2004

         COMP 4300 - Computer Architecture

         COMP 3350 – Computer Organization and Assembly Programming

Spring 2004

         COMP 4300 - Computer Architecture

         COMP 8970 – Architectures and Distributed Systems

Fall 2003

COMP 4300 - Computer Architecture

COMP 3350 – Computer Organization and Assembly Programming

Summer 2003

         COMP 3000 - OO Programming for Eng. & Scientists using C++

Spring 2003

         COMP 4300 - Computer Architecture

         COMP 8700/8706 - Real-time and Embedded Computing

Fall 2002

         COMP 4300 - Computer Architecture

         COMP 3350 – Computer Organization and Assembly Programming

Spring 2002    

         COMP 4300 - Computer Architecture

         COMP 3000 - OO Programming for Eng. & Scientists using C++

Fall 2001         

         COMP 4300 - Computer Architecture

         COMP 6720 - Real-time and Embedded Systems

Spring 2001    

         COMP 4300 - Computer Architecture

         COMP 8700/8706 - Real-time and Embedded Computing

Fall 2000         

         COMP 4300 - Computer Architecture

         COMP 6720 - Real-time and Embedded Systems

Spring 2000    

         COMP 605 - Modern Operating Systems

Winter 2000  

         COMP 505 - Operating System Design Principles

Fall 1999

         COMP 622 - Software Engineering II


Professional Activities

1.    Editorial Board Memberships (Associate Editor)

a.     International J. of Comp. and Applications, Acta Press, 2003-2012.

b.    International J. of Parallel and Distributed Compting, Acta Press, 2012-2013.

2.    Session Chairs: CATA 2010 (Honolulu), HIPC 2007 (Goa), ISCA 2003 (St. Louis), LCN 2002 (Miami), SCI 2002 (Orlando), EIT 2000 (Chicago)

3.    Program Committees: 16th International Conference on Computer Applications in Industry and Engineering, 2003, ISCA, Program Technical Committee, EESD Workshop, 22nd IEEE International Performance Computing and Communications Conference, 2003.

4.    Professional Memberships: IEEE-CS, ISCA

5.    IEEE Task force on cluster computing

6.    Panels and Reviewer: National Science Foundation, Arlington, VA, IEEE TPDS, JPDC, Conferences, Book reviews etc.


Grants: Funded

(Total funding > $ 2 million)

1.    Principal Investigator:  Educating Talented Scholars in Computer Science and Software Engineering, $594,352, National Science Foundation, 2010-2014.

2.    Principal Investigator:  Enhanced Micro-architectures for Real-time Systems, $160,366, DARPA, 2009-2010.

3.    Principal Investigator:  Wireless Techniques in Architecture and Fault Tolerance, National Science Foundation, 2004-2006.

4.    Principal Investigator:  Scheduling in Computational Grids, National Science Foundation, 2004-2005.

5.    Principal Investigator:  Embedded Networks and Real-Time and Embedded Computing, $1,440,000, Wind River Systems, Software in-kind grant, 2003-2008.

6.    Principal Investigator:  Competitive Research Grant, Auburn University, $10,000, 2002-2003

7.    Principal Investigator:  IRSC Grant, Auburn University, $20,000, 2000-2001.

8.    Principal Investigator:  Research Initiation Award; College of Engineering, Auburn University, 1999-2000.

9.    Principal Investigator:  Research and Creative Support Award, $5,000, Western Michigan University, Kalamazoo, MI, 1998-99.

10.Principal Investigator:  Graduate Student Support Award, $5,000, NASA/MSGC, 1997-1998.

11.Principal Investigator:  Research Development Award, $1,250, Western Michigan University, Kalamazoo, MI, 1997-1998.

12.Co- Principal Investigator:  Mentor Graphics Software Equipment Grant, Mentor Graphics, 1998.


Service and Leadership Roles

1.    Senator representing Computer Science and Software Engineering in the University Faculty Senate

2.    E-day Committee Chair (past)

3.    Department curriculum planning committee (past)