ELEC 6270-001/ELEC 5270-001 Low-Power Design of Electronic Circuits
Spring 2009, MWF 3PM, Broun 125
Course Syllabus, Grading sheet

CLASS TEST: Monday, April 6, 2009, Broun 125, 3:00PM - 3:50PM, books, notes, etc., permitted, problems.
FINAL EXAM: Thursday, May 7, 2009, Broun 125, 4:00PM - 6:30PM, books, notes, etc., permitted, problems.

HOMEWORKS:
Homework 1, assigned 2/25/09, due 3/11/09.
Homework 2, assigned 3/27/09, due 4/10/09.
Homework 3, assigned 4/23/09, due 4/29/09.
. . . T. Sakurai: Alpha Power-Law Model

PROJECT:
Assignments 3/13/09
Powersim (Updated 4/14/09): A gate-level power analysis tool, Tutorial, powersim.zip, Contact: Manish Kulkarni
One-page project plan outline due 3/30/09
Report (up to six-page technical paper format) due 4/17/09
Class presentation (15 minutes) with up to ~10 slides:
1. Venkatasubramanian, Muralidharan (4/17/09): Subthreshold Voltage Operation of Benchmark Circuit C6288, talk, report
2. Allani, Mridula (4/17/09): Low Voltage Sequential Circuit with a Ring Oscillator Clock, talk, report
3. Faraz, Ahmed (4/17/09): Gated Chock Shift Register, talk, report
4. Han, Chao (4/20/09): Estimate Power Saving by Clock Slowdown for s5378 in 180nm and 32nm CMOS, talk, report
5. Kulkarni, Manish (4/20/09): 32-bit ALU with sleep mode for high leakage technology, talk, report
6. Lewis, Grant (4/20/09): Binary Counter with Decimal and Gray Encoding, talk,, report
7. Mangilipally, Prardiva (4/22/09: 32-bit parallel load register with clock gating, talk, report
8. Mishra, Kautalya (4/22/09): Implement a Processor with Gated-Clock Flip-Flops and Estimate Power Saving, talk, report
9. Patterson, Clinton (4/24/09): Normal Speed 32-Bit Adder with Reduced Supply and Parallelism, talk, report
10. Shanmugasundaram, Priyadharshini (4/24/09): 32-Bit Adder for Low Voltage Operation with Level Converters, talk, report
11. Stevens, Colin (4/24/09): Very Low Voltage 16-Bit Counter in High Leakage Static CMOS Technology, talk, report
12. Sunwoo, Nelson (4/27/09): Design of Benchmark Circuit s5378 for Reduced Scan Mode Activity, talk, report
13. Thambehalli Venkatesh, Rakshith (4/27/09): Low Power RF amplifier, talk, report
14. Wray, Paul (4/29/09): Minimize Test Power for Benchmark Circuit c6288 by Optimal Ordering of Vectors, talk, report
15. Zhang, Yu (4/29/09): Redesign Control FSM of a Multicycle MIPS Processor with Low Power State Encoding, talk, report

LECTURES:
Lecture 1: VHDL Review, 1/7/09
Lecture 2: VLSI Simlation and Synthesis Tools, 1/9/09
Lecture 3: Introduction to Low Power Design, 1/12/09
Lecture 4: Power Dissipation of CMOS Circuits, 1/14/09
Lecture 5: Gate-Level Power Analysis, 1/26/09
Lecture 6: Power Analysis and Process Variation, 2/6/07
Lecture 7: High-Level Power Analysis, 2/13/09
Lecture 8: Linear Programming, 2/16/09
Lecture 9: Gate-Level Power Optimization, 2/25/09
Lecture 10: Test Power, 3/6/09
Lecture 11: Memory and Multicore Design, 3/23/09
Lecture 12: Power Aware Microprocessors, 3/30/09
Lecture 13: Adiabatic Logic, 4/8/09
Lecture 14: Pass Transistor Logic: A Low Power Logic Family, 4/13/09
Lecture 15: Pseudo-nMOS, Dynamic CMOS and Domino CMOS Logic, 4/17/09

READING ASSIGNMENTS:
1/14/09: M. D. Hill and M. R. Marty, "Amdahl's Law in Multicore Era," Computer, vol. 41, no. 7, pp. 33-38, July 2008.
1/14/09: D. H. Woo and H.-H. S. Lee, "Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era," Computer, vol. 41, no. 12, pp. 24-31, December 2008.
1/26/09: M. Bohr, "A 30 Year Retrospective on Dennard's MOSFET Scaling Paper".
1/26/09: 1974 paper by Dennard et al.

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