Publications

Books

• J.D. Cressler and G.F. Niu, Silicon-Germanium Heterojunction Bipolar Transistors, Artech House, January 2003 (589 pages).

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Selected Papers

Extreme Environment

1. G.F. Niu, “Enablement and Optimization of SiGe HBTs for Extreme Environment Electronics,” ECS Transactions, vol. 33, pp. 287-299, 2010. Invited.

2. L. Luo, G. Niu, K. Meon, J. Cressler, “Compact Modeling of the Temperature Dependence of Parasitic Resistances in SiGe HBTs Down to 30 K,” IEEE Trans. Electron Devices, vol. 56, no. 10, pp. 2169-2177, Oct 2009.

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Noise

1. G.F. Niu, “Noise in SiGe HBT RF Technology: Physics, Modeling and Circuit Implications,” Proceedings of the IEEE, Special Issue on SiGe Technology, pp. 1583 - 1597, Sep 2005 (Invited).

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2. K. Xia, G. Niu, “Discussions and extension of van Vliet’s noise model for high speed bipolar transistors,” Solid-State Electronics, vol. 53, no. 3, pp. 349-354, March 2009.

3. G. Niu, J.D. Cressler, W.E. Ansley*, C. Webster, and D.L. Harame, “A unified approach to RF and microwave noise parameter modeling in bipolar transistors,” IEEE Transactions on Electron Devices, vol. 48, no. 11, pp. 2568-2574, November 2001.

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4. G. Niu, S. Zhang*, J.D. Cressler, A. Joseph, J. Fairbanks, L. Larson, C. Webster, D.L. Harame, “Noise parameter modeling and SiGe profile design trade-offs for RF applications,” IEEE Transactions on Electron Devices, vol. 37, no. 11, pp. 2037-2044, November 2000.

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Linearity

1. G. Niu, Q.Q. Liang*, J.D. Cressler, C.S. Webster, and D.L. Harame, “RF linearity characteristics of SiGe HBTs,” IEEE Transactions on Microwave Theory and Techniques, vol. 49, no. 9, pp. 1558-1565, September, 2001.

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2. X. Wei, G. Niu, Y. Li, M.T. Yang, S. Taylor, “Modeling and characterization of intermodulation linearity on a 90nm RF CMOS technology,” IEEE Trans. Microwave Theory and Techniques, vol. 57, no. 4, pp. 965-971, April 2009.

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On-chip RF Measurement Techniques

1. X. Wei*, G. Niu, S. Sweeney, Q. Liang, X. Wang, S. Taylor, “A General 4-Port Solution for 110 GHz On-Wafer Transistor Measurements With or Without Impedance Standard Substrate (ISS) Calibration,” IEEE Trans. Electron Devices, vol. 54, no. 10, pp. 2706-2714, Oct 2007.

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Radiation Effects

1. X. Wei, T. Zhang, G. Niu, M. Varadharajaperumal, J. D. Cressler, and P. W. Marshall, “3-D Mixed Mode Simulation of Single Event Transients in SiGe HBT Emitter Followers and Hardening Guidelines,” IEEE Trans. on Nuclear Science, vol. 55, no. 6, pp. 3360-3366, Dec. 2008.
2. M. Varadharajaperumal*, G. Niu, R. Krithivasan*, J. D. Cressler, R. A. Reed, P. W. Marshall, G. Vizkelethy, P. E. Dodd, and A. J. Joseph, “3-D Simulation of Heavy-Ion Induced Charge Collection in SiGe HBTs,” IEEE Transactions on Nuclear Science, vol.?50, no.?5, pp. 2191-2198, December 2003.
3. G. Niu, R. Krithivasan*, J.D. Cressler, P.A. Riggs, B.A. Randall, P. Marshall, R. Reed, B. Gilbert, “A comparison of SEU tolerance in high-speed SiGe HBT digital logic designed with multiple circuit architectures,” IEEE Transactions on Nuclear Science, vol. 49, no. 6, pp. 3107-3114, December 2002.

RF CMOS

1. X. Wei, G. Niu, Y. Li, M.T. Yang, S. Taylor, “Modeling and characterization of intermodulation linearity on a 90nm RF CMOS technology,” IEEE Trans. Microwave Theory and Techniques, vol. 57, no. 4, pp. 965-971, April 2009. Also listed in measurement section.

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2. Yan Cui*, G. Niu, and Stewart S. Taylor, “Modeling of Anomalous Frequency and Bias Dependence of Effective Gate Resistance in RF CMOS,” IEEE Transactions on Electron Devices, vol. 53, no. 10, pp. 2620-2626, Oct. 2006.

Device Design Using TCAD

1. Y. Cui, G. Niu, Y. Shi, C. Zhu, J. Cressler, A. Joseph, “SiGe Profile Optimization for Improved Cryogenic Operation at High Injection,’’ Tech Digest of IEEE BCTM, pp. 1-4, Oct 2006.

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2. Y. Shi* and G. Niu, “Vertical Profile Design and Transit Time Analysis of Nano-Scale SiGe HBTs for Terahertz fT,” Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), pp. 213–216, Montreal Canada, Sept. 13th-14th, 2004.

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3. Y. Shi*, G. Niu, and J.D. Cressler, ``On the modeling of BGN for consistent device simulation of highly scaled SiGe HBTs,” IEEE Transactions on Electron Devices, vol. 50, no. 5, pp. 1370-1377, May 2003.

III-V Heterostructure Devices and Circuits

1. K.J. Chen and G. Niu, “Logic synthesis and circuit modeling of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices,” IEEE Journal of Solid-State Circuits, vol. 38, no. 2, pp. 312-318, February 2003.

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2. H. Yang*, G.F. Niu, P. Zampardi, and R. Welser, “Impact of burn-in effect and base strain on low frequency noise in InGaAsN HBTs,” Proc. of IEEE Bipolar/BiCMOS Circuits and Technology Meeting, pp. 220-223, Oct. 2005.