ME SEMINAR: Challenges in High Density and High Voltage IC Packages

IC package technologies have been making rapid strides with end product needs driving rapid developments.  Requirements for higher functional density than can be provided by planar scaling are propelling the semiconductor industry toward 3D architectures and package structures. These packages face multiple issues associate with through-silicon-via (TSV) reliability, thermal management, fault isolation, manufacturability, infrastructure and costs. On another front, new advances in GaN and SiC FET technologies offer the potential for direct AC to DC conversion without transformers, improving power conversion efficiency by 3-5 percent worldwide.  To meet this potential, special requirements are placed on surface mount components to survive both higher heat loads and voltages from 800-1500V, bringing a range of new reliability issues that must be overcome.  This seminar will highlight issues being faced by these new technologies, detail areas where advances must be made, and will challenge the attendees to find appropriate, cost effective solutions.

Darvin R. Edwards
Edwards' Enterprise Consulting LLC

Darvin R. Edwards joined Texas Instruments in 1980 after receiving a bachelor’s degree in physics from Arizona State University. He has been responsible for developing integrated test structures to evaluate chip/package interactions, improving the thermal performance of TI’s products, and for leading the Dallas package modeling team for 15 years. He wrote a series of design rules to ensure package reliability, and helped develop such technologies as flip-chip BGA, CSP, WCSP and TSVs.  Along the way, he helped introduce HAST and standardized thermal tests.  Elected TI Fellow in 1999, he was most recently responsible for Analog Si/Pkg interactions within the Semiconductor Packaging Group before retiring in 2013. Edwards is currently a consultant specializing in helping companies solve package reliability and thermal problems, as well as providing worldwide training. He serves as Member at Large for the IEEE CPTM society and is on the program committee of the Electronics Components and Technology Conference where he has served as chair of the Applied Reliability committee many times. Edwards has authored and co-authored over 60 papers and articles in the field of IC packaging, has written two book chapters, and holds 22 US patents. He has been active with JEDEC, SRC, and iNEMI.

Friday, February 26, 2016, 1:00 pm - 2:00 pm
1409 Wiggins Hall
P.K. Raju