.. _amplifier: ******************* Amplifiers ******************* .. Comments: .. This version contains CMOS inverter amplifier added on Oct 12, 2012. Objectives ================================================== #. Learn how to use a MOSFET as an amplifier #. Gain experience designing amplifier bias networks #. Review Bode plots #. Observe the spectra of different signals Required Soft Front Panels (SFPs) ==================================================== #. Digital Multimeter #. Function Generator (FGEN) #. Scope #. Bode Analyzer #. Dynamic Signal Analyzer Required Components ============================================= #. ZVN4306 MOSFET #. Several Resistors #. 4.7 :math:`k\Omega` resistor #. 6.8 :math:`k\Omega` resistor #. 150 :math:`k\Omega` resistor #. 390 :math:`k\Omega` resistor #. 3 numbers of 1 :math:`\mu` F capacitor #. 2.2 :math:`k \Omega` resistor Overview ============================ Fundamentals of MOS Transistor Amplifiers ----------------------------------------- Consider a MOSFET with a resistive load at the drain, like the one shown in :num:`figure #fig-ideal-amplifier`. This circuit is very similar to the resistor-load inverter. .. _fig-ideal-amplifier: .. figure:: images/amplifier/ideal-amplifier.png :scale: 50 % :alt: ideal-amplifier :align: center Ideal MOSFET amplifier. A change in Vgs causes a change in IDS, which then causes a change in the output voltage. So first order theory gives us :math:`\Delta V_{out} = \Delta I_{ds} * R_{load}`. Voltage gain is thus: .. math:: :label: vgain A_{v} = \frac{\Delta V_{out}}{\Delta V_{gs}} = \frac{\Delta I_{ds}}{\Delta V_{gs}} * R_{load} :math:`\Delta I_{ds} / \Delta V_{gs}` is called the transconductance gm. This equation, however, assumes very small AC input voltage, so that the output voltage change is still small. So if we make the small signal voltage gain 100, and we set the AC input voltage amplitude to 1mV, then the AC output voltage amplitude will be 100 * 1mV = 0.1V. Output Voltage Swing - Maximizing It with Bias Point Design -------------------------------------------------------------------- Now if :math:`V_{in} = \Delta V_{gs} = 2V`, :math:`\Delta V_{out}` is not going to have an amplitude of 2V * 100 = 200V. Rather :math:`V_{out}` will saturate as we have demonstrated with a real amplifier. When :math:`V_{gs}` is below threshold, the transistor cuts off. Thus, the highest :math:`V_{out}` possible is :math:`V_{dd} - 0 * R_{Load} = V_{dd}`. When :math:`V_{gs}` is very high, the current will increase, and hence pull down :math:`V_{out} = V_{dd} - I_{ds} * R`. For an ideal transistor with an ideal knee voltage or with a drain saturation voltage :math:`V_{dsat}=0V`, the best :math:`V_{out}` low we can achieve occurs when :math:`I_{ds} * R = V_{dd}`, and :math:`V_{out}` decreases to zero. If we further assume that the transistor :math:`I_{ds} - V_{gs}` is linear, we find that a maximum output voltage swing of :math:`V_{dd}` / 2 can be obtained if we choose a DC :math:`V_{ds}` equal to :math:`V_{ds,dc} = V_{dd} / 2`, as shown in :num:`figure #fig-load-line`. .. _fig-load-line: .. figure:: images/amplifier/load-line.png :scale: 50 % :alt: load-line :align: center Ideal load line. The load resistance :math:`R_{load}` is simply the ratio of the voltage swing (:math:`V_{ds,dc}` or :math:`V_{dd}/2`) to current swing (:math:`I_{ds,dc}`): .. math:: :label: rload R_{load} = \frac{V_{ds,dc}}{I_{ds,dc}} = \frac{V_{dd}}{(2 * I_{ds,dc})} Well, real MOSFETs are not so ideal, as we have seen from measured :math:`I_{ds}-V_{ds}` curves. The :math:`I_{ds}-V_{ds}` relation is not exactly linear but not too far off, either. The knee voltage, or :math:`V_{dsat}`, at which saturation occurs can be quite a bit above 0V, however. That fact can be taken into account by setting aside voltage room for the transistor to saturate. The consequence is basically that the lowest :math:`V_{out}` will not be zero volts. Stabilizing DC Bias Point with a Resistor at Source ----------------------------------------------------- We have seen that the output voltage and current swing have a lot to do with the DC :math:`I_{ds}` and DC :math:`V_{ds}`, which we denote as :math:`I_{ds,dc}` and :math:`V_{ds,dc}`. Together they are called the DC bias point. It is necessary to stabilize the DC bias point against fluctuations of :math:`V_{dd}`, temperature, K factor, or even transistor threshold voltage. Take an increase in :math:`V_{dd}` for example. It directly translates into a :math:`V_{gs,dc}` increase, which then increases :math:`I_{ds,dc}`. With a resistor between source and ground, as shown in :num:`figure #fig-amplifier-drawing`, an increase of :math:`V_{dd}` increases :math:`V_{g}`, which then increases :math:`I_{ds}`. .. _fig-amplifier-drawing: .. figure:: images/amplifier/amplifier-drawing.png :scale: 50 % :alt: amplifier-drawing :align: center MOSFET amplifier with feedback resistor. The :math:`I_{ds}` increase, however, increases :math:`V_{s} = I_{ds} * R_{s}`. Consequently, the resulting :math:`V_{gs}` increase is less than the original :math:`V_{g}` increase from the :math:`V_{dd}` increase, simply because :math:`V_{gs} = V_{g} - V_{s}`. The :math:`R_{s}` resistor is thus said to act as a negative feedback, as it negatively affects the increase of :math:`I_{ds}`. AC Operation Consideration of Feedback ----------------------------------------- For an AC signal, we do not necessarily want the large negative feedback. Assume we want all of the AC input voltage to appear across :math:`V_{gs}`, without any drop over :math:`R_{s}`. We can just add a large enough capacitor across :math:`R_{s}`, so that :math:`R_{s}` is shorted out by the capacitor, as shown in :num:`figure #fig-amplifier-drawing`. Design Procedure ---------------- #. Choose a reasonable :math:`V_{s}` for stability of dc bias, this sets :math:`R_{s}=V_{s}/I_{ds,dc}`. #. Find :math:`V_{gs}` necessary to produce the :math:`I_{ds,dc}` given. #. In simulation, just connect the drain and gate together for saturation operation, force a current of :math:`I_{ds,dc}`, and read the voltage value. #. In the lab you can run a 2-wire analyzer measurement in the same way that you found the threshold voltage from a given threshold current. #. Find :math:`V_{g} = V_{gs} + V_{s}`. #. Find R1 and R2 that will give the desired :math:`V_{g,dc}`. #. Approximately set :math:`V_{ds,dc} = (V_{dd}-V_{s})/2`. #. Determine :math:`R_{load} = V_{ds,dc} / I_{ds,dc}`. We can consider the finite :math:`V_{dsat}` in design and simulation. For first order design, the above simplification works just fine, and greatly simplifies the design. Vs choice Tradeoffs ------------------- A larger :math:`V_{s}` means more feedback, and gives a more stable dc bias point against :math:`V_{dd}`, temperature, transistor :math:`V_{t}`, and transistor K variation. However, more :math:`V_{s}` means less voltage room to work with. Remember that :math:`V_{dd} - V_{s}` is the available voltage room to work with. Furthermore, for real transistors, we have to choose :math:`V_{ds,dc}` to be approximately above :math:`V_{gs,dc}-V_{t}` to be in the saturation region. R1, R2 choice ------------- R1//R2 (R1 in parallel with R2) will be the input impedance seen by the ac voltage source (shown in :num:`figure #fig-amplifier-drawing-with-capacitors`). .. _fig-amplifier-drawing-with-capacitors: .. figure:: images/amplifier/amplifier-drawing-with-capacitors.png :scale: 50 % :alt: amplifier-drawing-with-capacitors :align: center MOSFET amplifier with feedback resistor and DC blocking capacitors. Normally we want R1 // R2 to be large, say around 100 :math:`k\Omega` or more. Generally, we do not want R1//R2 to be small, as it will place too much of a load on the AC source. A small :math:`R_{in}` means a large input current requirement, or a "heavy" load. An extreme example would be a short circuit of a load to a source. DC Blocking Capacitors ---------------------- Normally, when we think of an AC signal, it is centered about zero volts. Think about the signal driving your speakers. However, if the output of the amplifier is taken directly from the drain, it will have a considerable DC bias. The solution is the addition of a capacitor at the output, as shown in :num:`figure #fig-amplifier-drawing-with-capacitors`. This capacitor will allow the amplified signal to pass, but not the DC bias. That is why they are called DC blocking capacitors, or alternatively, AC coupling capacitors. A capacitor is also needed at the input. Otherwise, the gate voltage might be changed by the device that is driving it. Worse, the device connected to the amplifier might be damaged by the gate voltage. Think about connecting the line out jack of a CD player to a stereo. BJT Amplifiers -------------------------- The schematic of a bipolar transistor amplifier using a 4R bias circuit is shown below in :num:`figure #fig-4r-schematic`. .. _fig-4r-schematic: .. figure:: images/amplifier/4rschematic.png :scale: 100 % :alt: 4R bias amplifier schematic :align: center Bipolar transistor amplifier schematic. We can immediately recognize the 4R biasing circuit used. Note that we have two Re's, Re1 and Re2, Re1 is for negative feedback in "ac" signal. Re2 is for negative feedback in DC bias. Exactly how to choose (:math:`I_{C}`, :math:`V_{CE}`) will take more discussions which will be covered in *Analog Electronics*. For now, let us consider that we have been given a (:math:`I_{C}`, :math:`V_{CE}`) bias point. We have designed a biasing circuit to produce the required (:math:`I_{C}`, :math:`V_{CE}`) using a Si bipolar transistor, 2N3904 in this experiment. We have added 3 capacitors that are going to block DC and pass AC. Of course, each capacitor's impedance depends on frequency. A photo of a bipolar transistor amplifier using 4R bias is shown below in :num:`figure #fig-4r-photo`. .. _fig-4r-photo: .. figure:: images/amplifier/4r-board-photo.png :scale: 100 % :alt: 4R bias amplifier photo :align: center Bipolar transistor amplifier on ELVIS breadboard. Pre lab ================================== #. Find the gate-source voltage necessary for a 1mA drain current. You may find this multisim file helpful: :download:`download <./customprograms-auto-dev-name/amplifier/amplifier-prelab-vgs.ms11>`. It contains the correct model for the MOSFET used in the lab. #. Design a 4 resistor biasing network for a MOSFET with a drain current of 1mA, 2v source voltage, and an input equivalent resistance of 110 :math:`k\Omega`. The input resistance is defined as R1||R2. :math:`V_{dd}` is 15v. A sample circuit is shown in :num:`figure #fig-sample-circuit`. .. _fig-sample-circuit: .. figure:: images/amplifier/sample-circuit.png :scale: 100 % :alt: sample-circuit :align: center Sample MOSFET bias network. #. Verify the DC operating point of your bias network with Multisim. Measure :math:`V_{d}`, :math:`V_{s}`, and :math:`V_{gs}`. Use the ELEC2210_ZVN4306A (used in prelab step 1) as the MOSFET. #. Add 1 :math:`\mu` F capacitors to your circuit, as shown in :num:`figure #fig-amplifier`, and then simulate your amplifier using Multisim. Select AC Analysis and sweep from 10Hz to 5MHz. Plot Output/Input. In order to make your graph show up better when printed (and save toner), use a white background. From the grapher view menu bar select Graph > Black and White Colors. Lab Exercises ========================================= MOSFET Amplifier Biasing Network ----------------------------------- #. Construct a biasing network for a ZVN4306 using the resistor values calculated in the prelab. Use +15v for :math:`V_{dd}`. If the exact value is not available, use the next closest resistor. #. Measure the drain voltage, source voltage, and :math:`V_{gs}`. .. topic:: What to do in lab report Compare measured voltages with expected values. MOSFET Amplifier ------------------- #. Add three capacitors to your circuit, as shown in :num:`figure #fig-amplifier`. .. _fig-amplifier: .. figure:: images/amplifier/amplifier.png :scale: 100 % :alt: amplifier :align: center MOSFET Amplifier. #. Connect the function generator to the input of the amplifier. Select a 5kHz sine wave, .05vpp. #. Connect the input of the amplifier to scope CH0 and connect the output to scope CH1. Be sure to select SCOPE CH0 and SCOPE CH1 on the oscilloscope SFP, as shown in :num:`figure #fig-scope`. Because we will need to take measurements at frequencies higher than the analog inputs' sampling frequency, they cannot be used. The BNC jacks and analog inputs should already be tied together on your board, so that either will work. Otherwise, be sure to use the BNC jacks on the side of the ELVIS base. .. _fig-scope: .. figure:: images/amplifier/scope.png :scale: 100 % :alt: scope :align: center Oscilloscope settings. #. Take screenshots of the output and input waveforms at several frequencies: 500Hz, 5kHz, 50kHz for calculating ac voltage gain later in lab report. Use the formula Gain = :math:`\frac{V_{pp,out}}{V_{pp,in}}`. Only absolute value is required, but you should notice that transistor is naturally inverting in this amplifier configuration. Select a scale large enough that allows accurate amplitude measurements. #. Make measurements and take screenshots so that you can later calculate the ac voltage gain's absolute value for the following input amplitudes at 5kHz: .1vpp, .4vpp, .7vpp, 1vpp, 1.3vpp. .. note:: Keep in mind that as you adjust the input amplitude, your scope settings will need to be adjusted accordingly. The entire waveform must be visible on the scope display in order to make accurate measurements. #. Using the second scope channel, measure the drain and source voltages for an input of 5kHz, 1.3vpp. See :num:`figure #fig-vd` below for an example of the drain voltage. .. _fig-vd: .. figure:: images/amplifier/vd.png :scale: 100 % :alt: drain voltage :align: center Drain voltage of clipping amplifier. .. topic:: What to do in lab report Show screenshots and calculate gain for all measurements. Show screenshots of Vd and Vs. Explain what you see. Plot measured gain as a function of Vin. Spectrum Analyzer -------------------- #. Open the Dynamic Signal Analyzer. Set the source channel to SCOPE CH1. #. Set the function generator to produce a 5kHz sine wave at .05vpp. Take a screenshot of the output signal spectrum, similar to the one in :num:`figure #fig-spectrum-analyzer`. .. _fig-spectrum-analyzer: .. figure:: images/amplifier/spectrum-analyzer.png :scale: 100 % :alt: spectrum analyzer :align: center Spectrum analyzer. #. Increase the amplitude until the output is clipping near both peak and valley. Take a screenshot of the output spectrum. #. Experiment with other types of waveforms, amplitudes, frequency sweeps, etc. .. topic:: What to do in lab report Compare the sinusoidal output spectrum to the spectrum of the waveform that is clipping. Explain why they are different. Include anything else you found interesting. Bode Plot ------------ #. Open the Bode Analyzer. Set the start frequency to 10Hz and set the Stop frequency to 5MHz. Use a peak amplitude of .05, as shown in :num:`figure #fig-bode-analyzer`. Take a screenshot. .. _fig-bode-analyzer: .. figure:: images/amplifier/bode-analyzer.png :scale: 100 % :alt: Bode analyzer :align: center Bode analyzer. .. topic:: What to do in lab report Compare the measured frequency response with the simulated results from pre lab. Radio -------- #. Disconnect the function generator from the input of your amplifier. Leave CH0 connected to the function generator. #. Take two pieces of wire about a foot long. Connect one wire to the FGEN terminal and connect the other wire to the input of your amplifier. Both wires should be vertical and parallel to one another, but not touching. #. Set the function generator to produce a 300 kHz, 10vpp sine wave. #. Observe the transmitted and received waveforms on the scope. Take a screenshot .. topic:: What to do in lab report Show screenshot. .. CMOS Amplifier ------------------------ In this exercise we will build a CMOS amplifier. Here a PMOS transistor acts as the load for the NMOS transistor instead of a rersistor (R3) as was done earlier in :num:`Figure #fig-amplifier`. This circuit is essentially an inverter (that we worked with in labs 8 & 9) with the input biased at the center of the input-output voltage transfer curve. Biasing the inverter at its mid-point enables it to provide large amplification to small signal variations at its input. As we will see below, gains up to 20 can be obtained using this simple circuit. #. Use **CD 4007** and make the following connections (also shown in :num:`Figure #fig-cmos-amplifier-connections`): (7,GND), (14, V+), (8,13). Output is at pin 13, connect it to AI1+. Connect FGEN to AI0+. Connect both AI- to GND. *Note: V+ here refers to positive terminal of the variable power supply.* #. Connect FGEN to pin 6 through 7.6 :math:`\mu` F capacitor (in series), which serves to couple the small signal input to the amplifier. To realize 7.6 :math:`\mu` F, connect a parallel combination of two 3.3 :math:`\mu` F, and one 1 :math:`\mu` F capacitors. Also, FGEN is internally referenced, so **do not** connect FGEN to Ground. #. From pin 6, connect 10 :math:`k\Omega` each to V+ (VDD) and GND. Verify that your connections are complete as shown in the :num:`Figure #fig-cmos-amplifier-connections` below. .. _fig-cmos-amplifier-connections: .. figure:: images/amplifier/cmos-amplifier-connections.png :scale: 60 % :alt: cmos-amplifier-connections :align: center CMOS Amplifier connections using CD 4007. Numbers on nets indicates pin numbers on CD4007. #. Start the SFP and set V+ on the VPS to 10V. Refer :num:`Figure #fig-inverter-amplifier`. #. Set peak-to-peak voltage on FGEN to 0.1V, and frequency to 500Hz. Refer :num:`Figure #fig-inverter-amplifier`. .. _fig-inverter-amplifier: .. figure:: images/amplifier/inverter-amplifier.png :scale: 40 % :alt: inverter-amplifier :align: center CMOS Amplifier input and output waveforms, with VPS and FGEN settings. #. Take a screen shot of the input and output waveforms available on the two channels as shown in :num:`Figure #fig-inverter-amplifier`. Also, notice that the output, displayed on Channel 0 has a phase difference of :math:`180^0` with respect to the input (displayed on Channel 1) as you would expect in an inverter. .. topic:: What to do in lab report Show screenshot. Calculate gain of the amplifier. Use the formula Gain = :math:`\frac{V_{pp,out}}{V_{pp,in}}`. BJT Amplifier ------------------------ #. Construct the BJT amplifier shown below in :num:`figure #fig-bjt-amp-schematic`. Notice that the circuit is exactly like the MOS amplifier with the exception that the MOS transistor is replaced by a BJT 2N3904. .. _fig-bjt-amp-schematic: .. figure:: images/amplifier/bjt-amp-schem.png :scale: 100 % :alt: bjt-amp-schematic :align: center BJT amplifier schematic. #. Set the function generator to produce a 10kHz, 0.01Vpp sine wave. #. Measure the input and output of the amplifier using the scope. As we do not have AC negative feedback, the voltage gain is high. #. Use the dynamic signal analyzer to measure the output spectrum for a 5kHz .05vpp sine wave input. Be sure to set the source to CH1. Take a screenshot of the output signal spectrum, similar to the one in :num:`figure #fig-spectrum-analyzer`. #. Open the Bode Analyzer. Set the start frequency to 10Hz and set the Stop frequency to 5MHz. Use a peak amplitude of .05, as shown in :num:`figure #fig-bode-analyzer`. Take a screenshot. .. topic:: What to do in lab report Show 3 screenshots. Compare the output spectrum and Bode plots to those of the MOSFET amplifier. Clean up ------------------------------------------ Please place components back in the correct drawer. Thank you for keeping our lab clean and organized. .. topic:: Feedback You are encouraged to write down your experience with this lab along with any feedback or suggestions. You can also document mistakes or missteps that occurred, e.g. * I could not find the correct scope inputs, or * the Bode Analyzer confused me, Such information will be used to improve this and future labs and your experience will help future students. .. comments Typical input and output waveforms are shown below in :num:`figure #fig-4r-vout-vin`. for a small input signal with a peak to peak voltage of 100 mV. Note the scale difference for the two channels. The input and output show a 180 degree phase difference, as expected from the transistor's natural inverting property. .. _fig-4r-vout-vin: .. figure:: images/amplifier/bjt-vout.png :scale: 100 % :alt: 4R bias vout vin :align: center Input and output waveforms In the photo, the AC input voltage is wired to both AI0 and SCOPE CH0. The AC output voltage is wired to both AI1 and SCOPE CH1. The AI inputs have a sampling rate limit of 1.25 Ms/second, The SCOPE inputs, however, have a much higher sampling rate of 100 Ms/second.