ELEC 2200-002 Digital Logic Circuits
Fall 2012, MWF 2PM, Broun 238

Course Syllabus, Grading Sheet

Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE, Broun 323, Office hours: MF 3:00-4:00PM.

Teaching Assistant: Nikhil Garrepalli, Phone 334-844-1865, Broun 359, Consultation: MW 9:00-10:30AM.

Textbook: V. P. Nelson, H. T. Nagle, B. D. Carroll and J. D. Irwin, Digital Logic Circuit Analysis and Design, Prentice-Hall, 1995.

EXAM SCHEDULE:
Test 1: Friday, 9/14/12, 2:00PM-2:50PM, Broun 238, open book (books, notes, computer, calculator allowed).
Test 2: Wednesday, 10/10/12, 2:00PM-2:50PM, Broun 238, open book (books, notes, computer, calculator allowed).
Test 3: Wednesday, 11/7/12, 2:00PM-2:50PM, Broun 238, open book (books, notes, computer, calculator allowed).
Final Exam, Tuesday, 12/04/12, 4:00-6:30PM, Broun 238, use of textbook, class lectures, notes, computer, etc., permitted.

ANNOUNCEMENTS:
8/19/12 Auburn Co-Op Employment Opportunities
11/27/12 Reminder: Course Evaluation Site, open 11/25/12 through 12/2/12

HOMEWORK:
Homework 1, assigned 8/20/11, due 8/27/11
Classwork 2, An open-book homework to be completed in class, 8/29/12, 2-2:50PM
Homework 3, assigned 9/5/12, due 9/12/12
Homework 4, assigned 9/19/12, due 9/28/12
Homework 5, assigned 10/1/12, due 10/8/12
Homework 6, assigned 10/12/12, due 10/22/12
Homework 7, assigned 10/26/12, due 11/2/12
Homework 8 and 9, assigned 11/12/12, due 11/26/12
Homework 10, assigned 11/16/12, due11/30/12

LECTURES AND READING ASSIGNMENTS: For details see webpages of most recent years.
Lecture 5: Introduction to VHDL (N. Garrepalli), 9/26/12

PREVIOUS OFFERING BY V. AGRAWAL:
Fall 2011 Fall 2010 Fall 2008