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ELEC4200 Digital System Design Introduction to ISE & ModelSim (Lab0) Professor: Charles E. Stroud Tutorial by: Gefu Xu |
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Download & Verify Design This is the last step in the design verification process. This section provides instructions for downloading the MUX design onto the Spartan 3 PCB. 1) Connect the 5V DC power cable to
the power input on the demo board (J4).
(note: you may see a sequence of numbers begin to flash on the
7-segment LEDs, this is just a test configuration stored in the flash memory
on the PCB and you can manipulate the various switches and button, except for
the PROG button, on the PCB to see the operation of the LEDs and 7-segment
displays). 2) Connect the download cable between
the PC parallel port and the demo board (J7). 3) Select Synthesis/Implementation
from the drop-down list in the Sources window and select Mux_Schematic or
Mux_vhdl (or whatever you named your design) in the Sources Window. In the
Processes window, beneath the Generate
Programming File process double-click the Configure Device (iMPACT) process.
4) Click Ok on the following Warning:
5) The Xilinx WebTalk Dialog box may
open during this process. Click Decline. Select Disable the collection of
device usage statistics for this project only and click OK. 6) iMPACT opens and the Boundary Scan
window is displayed as below. Right click on the main window and select Initialize
Chain.
7) The following window will pop-up the
first time you configure your device but you can prevent it from coming back
by checking the ¡°Don¡¯t show¡± box shown below and
clicking Yes.
8) The Assign New Configuration File
dialog box appears. To assign a configuration file to the xc3s200 device in
the JTAG chain, select the correct ¡°.bit¡± file (below it is the
¡°mux_vhdl.bit¡± file which is highlighted) that has been created for your
specific design (make sure you are in the correct Project Directory) and
click Open:
9) In the following figure, Bypass is selected to skip the
remaining device xcf02s which is
an on-board flash memory used to store configurations. Note: we will also discuss the meaning
of Bypass when we discuss Boundary Scan later in the semester:
10) On the Device Programming Properties window simply click OK:
11) The following window will appear
telling you that the mux_vhdl.bit file is linked with the xc3s200 device
which is our FPGA:
12) If you get a Warning message, click
OK (this message is a result of the JTAG configuration interface we are using
to download the configuration data).
Note that these warning messages may vary with versions of ISE (this
one was taken from ISE8.2). Note:
we will discuss the meaning of this warning message later in the semester
when we discuss Boundary Scan (aka JTAG).
13) Right-click on the xc3s200 device
image, and select Program. The
Programming Properties dialog box opens. Click OK to program the device.
14) When programming is complete, the
Program Succeeded message is displayed as shown below.
15) Close iMPACT without saving (click No when you are prompted to save). Your design is now downloaded onto the FPGA and you can begin to verify/test it by manipulating switches/buttons and observing LEDs as specified in your design. |
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