The VLSI
Design & Test Seminar Series
seeks to provide an open forum for various
faculty, graduate and undergraduate students with research and development
efforts in the area of design and test of VLSI systems, including application
specific and programmable circuits in digital, analog, and mixed-signal
microsystems. The goal is to promote further learning, discussion, and teamwork
along with the conception and development of exciting new ideas.
The seminar
series counts as a 1-credit course ELEC7950 (which may be repeated for up to 3
credits).
This seminar
series sponsored by:
the Testing Group at Auburn:
Vishwani Agrawal - Design for Testability (DFT) and low-power design
Foster Dai - mixed-signal and analog design and
testing
Vic Nelson - ASIC/FPGA testing and fault
tolerance
Adit Singh - digital and mixed-signal VLSI
design and Design for Testability (DFT)
Chuck Stroud - digital and mixed-signal Built-In
Self-Test (BIST)
Spring 2012
schedule:
When: Wednesdays from 4-5:30pm
Where: Broun Hall room 235
Coordinator: Chuck Stroud
Invitation: If you are interested in presenting a
seminar or defending your thesis/dissertation, please contact the coordinator.
Notes: The following is a tentative schedule
(speakers/topics in blue text are not confirmed at this point). A link under Speaker is to an
abstract of the presentation and a link under Topic is to a PDF
file of the presentation slides.
|
Date |
Speaker |
Topic (w/ link to presentation slides after seminar date) |
|
Jan 11 |
No Seminar |
First Week of
Classes |
|
Jan 18 |
Chuck Stroud |
Architecture
Independent Testing |
|
Jan 25 |
A
History of the VLSI Design Conference (Keynote Address from 2012
conference in Hyderabad, India) |
|
|
Feb 1 |
Controlled
Transition Density Based Power Constrained Scan-BIST with Reduced Test Time
(MS Defense) |
|
|
Feb 8 |
Chuck Stroud |
Architecture
Independent Testing (The Sequel) |
|
Feb 15 |
Adit Singh |
Current and
Future Challenges in VLSI Testing |
|
Feb 22 |
Chuck Stroud |
Architecture
Independent Testing (The Prequel) |
|
Feb 29 |
Vic Nelson |
System On Chip
for Embedded Systems Application |
|
Mar 7 |
Xi Li |
Survey of
Wireless Network-on-Chip Systems (MEE Defense) |
|
Mar 8 |
All-Digital Replica
Techniques for Managing Random Mismatch in Time-to-Digital Converters
(SSST’12 presentation) B203 Irwin Conf Room at 4pm |
|
|
Mar 14 |
No Seminar |
Spring Break |
|
Mar 21 |
Yu Zhang |
Diagnostic Test
Pattern Generation and Fault Simulation for Stuck-At and Transition Faults
(PhD Defense) |
|
Mar 22 |
Suraj Sindia |
High
Sensitivity Test Signatures for Unconventional Analog Circuit Test Paradigms (PhD General Exam) B203 Irwin Conf
Room at 4pm |
|
Mar 28 |
Zach Hubbard |
Stretch
Processing Radar RFIC System Analysis and Front-End Design (MS Defense) |
|
Apr 4 |
Colin Stevens |
Micromachined Snap-In Resonators (International Conf. on Device Packaging
presentation) |
|
Apr 11 |
Zhao Feng |
Advanced Design
Techniques for Phase-Locked Loop and its Building Blocks (PhD General Exam) |
|
Apr 18 |
Xi Qian |
Detection of
Gate-Oxide Defects with Timing Tests at Reduced Power Supply (VTS’12
presentation) |
|
Apr 25 |
No Seminar |
Last Day of
Classes |
Links to
previous semesters of the VLSI Design & Test Seminar Series:
Fall
2011: Coordinator Vishwani Agrawal
Spring 2011: Coordinator Adit Singh
Fall 2010: Coordinator Adit Singh
Spring 2010: Coordinator Chuck Stroud
Fall
2009: Coordinator Vishwani Agrawal
Spring
2009: Coordinator Adit Singh
Fall 2008: Coordinator Chuck Stroud
Spring
2008: Coordinator Vishwani Agrawal
Fall
2007: Coordinator Adit Singh
Spring 2007: Coordinator Chuck Stroud
Fall
2006: Coordinator Adit Singh
Spring
2006: Coordinator Vishwani Agrawal
Fall 2005: Coordinator
Chuck Stroud
Spring
2005: Coordinator
Adit Singh
Fall 2004: Coordinator Chuck Stroud