Sanjeev Baskiyar, Ph.D.
 

Associate Professor

3127C Shelby Technology Center 
Department of Computer Science & Software Engineering
Auburn University, Auburn, AL 36849
Voice: (334)-844-6306, Fax (334)-844-6329
e.mail:  baskiyar @ eng.auburn.edu

 

Sanjeev Baskiyar received the PhD and MSEE degrees (major: Electrical (Computer) Engineering, minor: Computer Science) from the University of Minnesota, Twin Cities (Minneapolis), in 1993 and 1988 respectively and the BE (Electronics and Communications) degree from the Indian Institute of Science, Bangalore in 1984.  He received the BS degree in Physics with honors and distinction in Mathematics in 1981.  He was a recipient of several competitive national and state level scholarships.  His academic record has been in the top decile.  He was nominated for the Best Teaching Assistant of the Year award in the ECE dept. at the University of Minnesota, Minneapolis.  He has taught courses in the areas of Real-time and Embedded Computing, Computer Architecture, Operating Systems, Microprocessor Programming and Interfacing and VLSI Design.   His research interests are in the areas of Computer Architecture, Distributed Computing and Task Scheduling.  His experience includes working as an Assistant Professor at Western Michigan University, as a Senior Software Engineer in Unisys Corporation, as a Programmer in IBM's ProjectWoksape, as a Project Manager in UofM, St. Paul and as a Computer Engineer in Tata Engineering and Locomotive Company Ltd., India.  He has published in the areas of Computer Architecture and Task Scheduling on Multiprocessors.  He is an Associate Editor of the International Journal of Computers and Applications, Acta Press.  He is listed in Who’s Who in America.  Dr. Baskiyar’s research has been supported by external grants from the National Science Foundation, NASA/MSGC, Wind-River Systems and Mentor Graphics.  He is currently Associate Professor (with tenure) in the department of Computer Science and Software Engineering at Auburn University. 

Educational Record

   PhD                                         University of Minnesota, Minneapolis
   MSEE                                      University of Minnesota, Minneapolis
   BS(ECE)                                 Indian Institute of Science, Bangalore 
   BS Physics (honors)               St. Xavier's College, India

Specialty Areas

1.    Real-time and Embedded Computing

*   Scheduling on Embedded Systems, Clusters and Grids

*   Thermal and Power Aware Scheduling

2.    Computer Systems Architecture

*   Enhancing micro-architecture and fault tolerance by applying intra-chip wireless communication

*   Improving disk and disk-cluster access by novel data and meta-data organization

 

Interested students may call 844-6306 or e-mail baskiyar @ eng.auburn.edu for more information.

Research Milestones

1.    First to design intra-chip wireless communication to enhance computer architectures.

2.    First to identify and prove NP-completeness of the fundamental task in-tree scheduling problem on completely connected multiprocessors

3.    Development of optimal schedules on a very wide set of restricted task in-trees on multiprocessors

4.    First to introduce the concept of object-invocation graph in program decomposition and partitioning on multiprocessors for efficient execution

5.    Development of an O(n3p) heuristic yielding optimal/very near-optimal schedule lengths for thousands of random and benchmark directed a-cyclic task graphs on homogeneous multiprocessors

6.    Development of one of the fastest dynamic method resolution techniques for pure object-oriented programs that is usable for reentrant programs

7.    First to introduce the concept of scheduling libraries

8.    First to develop windows based interactive complete Smith Chart

Selected Refereed Publications

(A * next to the name refers to graduate student)

1.    Cong, L.*, Baskiyar, S. and Li, S.*, “A General Distributed Scalable Peer to Peer Scheduler for Mixed Tasks in Grids,”   Lecture Notes on Computer Science, vol. 4873, pp. 320-330, Springer, 2007.

2.    Baskiyar, S. and SaiRanga, P.*, “Scheduling DAGs on heterogeneous network of workstations to minimize finish time,” International Journal of Computers and Their Applications, vol. 13, no 4, Dec 2006.

3.    Abdel-Kader, R.* and Baskiyar, S., “Power managed task scheduling on heterogeneous systems,” Proc. of International Conference on Parallel and Distributed Computing, ISCA, 2006.

4.    Cong, L.*, Baskiyar, S. and Wang, C.J.*, “A distributed peer to peer grid scheduler,” Proceedings of the International Conference on Parallel and Distributed Computing and Systems, IASTED, Nov. 2006.

5.    Baskiyar, S. and Palli, K.K.*, Low-power scheduling of DAGs to minimize finish time, LNCS-HIPC, 2006.

6.    Baskiyar, S. and Dickinson, C.*, “Scheduling directed a-cyclic task graphs on a bounded set of heterogeneous processors using task duplication,” Journal of Parallel and Distributed Computing, vol. 8, no 65, pp 911-921, Elsevier, 2005.

7.    Baskiyar, S. and Meghanathan, N., “A survey of contemporary real-time operating systems,” Informatica, vol. 29, no. 2, pp 233-240, 2005.

8.    SaiRanga, P.* and Baskiyar, S., “A low complexity algorithm for dynamic scheduling of independent tasks onto heterogeneous computing systems,” 43rd ACM SE conference, Kennesaw, GA, March 2005.

9.    Baskiyar, S. and Meghanathan, N.*, “Binary codes for fast determination of ancestor-descendant relationship in trees and directed a-cyclic graphs,” International Journal of Computers and Their Applications, vol. 10, no. 3, pp. 67-71, 2003.

10. Baskiyar, S. and SaiRanga, P.C.*, “Scheduling directed a-cyclic graphs on heterogeneous computing systems, Workshop on CRTPC in Proc.  32nd International Conference on Parallel Processing, 2003.

11. Baskiyar, S. and Dickinson, C*., “Scheduling directed a-cyclic task graphs on heterogeneous processors using task duplication,” LNCS, vol. 2913, pp. 259-267, Springer-Verlag, 2003.

12. Baskiyar, S. and SaiRanga, P. C.*, “Scheduling DAGs on heterogeneous network of workstations to minimize finish time,” Proc. ISCA 16th International Parallel and Distributed Computing Symposium, pp. 30-35, 2003. 

13. Baskiyar, S., A computer based educational Smith Chart,” Computers in Education Journal, vol. 13, no. 3, pp 76-80, 2003.

14. Baskiyar, S., “Efficient execution of pure object-oriented programs by follow-up compilation,” Computing, Springer-Verlag, vol 69, no. 10, pp. 273-289, 2002.

15. Baskiyar, S., “A real-time fault tolerant intra-body network,” Proc. 27th International LCN, pp 235-240, 2002, Tampa, FL, IEEE-ACM Press.

16. Baskiyar, S., “Simulating DNA computing,” Lecture-Notes in Computer Science, v. 2552, pp. 411-419, Springer-Verlag, 2002. 

17. Baskiyar, S., “A survey on real-time operating systems,” Proc. IASTED-NPDA, 2002, Tsukuba, Japan, Acta Press.

18. Baskiyar, S., “A software simulation of DNA computing,” Proc. 15th PDCS, 2002, pp 373-378, Louisville, KY, ISCA.

19. Baskiyar, S., “Scheduling task in-trees on distributed memory systems,” Proc. 15th IPDPS, San Francisco, CA, 2001 (IEEE-ACM).

20. Baskiyar, S., “Minimizing makespan of task in-trees,” IEICE Transactions on Information and Systems, Oxford Univ. Press, vol. E 84-D, no. 6,  pp. 685-691, 2001.

21. Baskiyar, S. and Meghanathan, N.*, “Scheduling and load balancing in mobile computing using tickets,” Proc. 39th SE-ACM Conference, Athens, GA, 2001.

22. Baskiyar, S., “Speeding Smalltalk programs using follow-up compilation,” Proc. EIT Conf, Chicago, 2000, IEEE.

23. Baskiyar, S., “Scheduling DAGs on message passing m-processors systems,” IEICE Transactions on Information and Systems, vol. E-83-D, no. 7, pp. 1497-1507, Oxford Univ. Press, 2000.

24. Baskiyar, S. and Kain, R.Y., “Smith chart with GUI,” Proc. NC-ASEE Conf., Erie, 1999.

25. Baskiyar, S. and Kain, R. Y., “Architectural support for enhancing object­-oriented program execution times,” Proc. OOS, Jan. 1993, San Diego, CA.

26. Baskiyar, S. and Kain, R. Y., “On the complexity of scheduling task trees on multiprocessors to minimize makespan,” Proc. JSPP, Tokyo, Japan, 1993.  (Also reprinted in SIG‑PP, Japan Society of Artificial Intelligence, 1993)

Teaching

Spring 2008

COMP 3350 – Computer Organization and Assembly Programming

Fall 2007

COMP 4300 - Computer Architecture

COMP 3350 – Computer Organization and Assembly Programming

Spring 2007

COMP 3350 – Computer Organization and Assembly Programming

COMP 5720/6720—Real-time and Embedded Computing

Fall 2006

COMP 4300 - Computer Architecture

COMP 3350 – Computer Organization and Assembly Programming

Spring 2006

COMP 4300 - Computer Architecture

COMP 8970 – Real-time and Embedded Computing

Fall 2004

COMP 4300 - Computer Architecture

COMP 8970 – Computer Organization and Assembly Programming

Spring 2004

COMP 4300 - Computer Architecture

COMP 8970 – Architectures and Distributed Systems

Fall 2003

COMP 4300 - Computer Architecture

COMP 3350 – Computer Organization and Assembly Programming

Summer 2003

          COMP 3000 - OO Programming for Eng. & Scientists using C++

Spring 2003

COMP 4300 - Computer Architecture

COMP 8700/8706 - Real-time and Embedded Computing

Fall 2002

COMP 4300 - Computer Architecture

COMP 3350 – Computer Organization and Assembly Programming

Spring 2002

COMP 4300 - Computer Architecture

COMP 3000 - OO Programming for Eng. & Scientists using C++

Fall 2001    

COMP 4300 - Computer Architecture

COMP 6720 - Real-time and Embedded Systems

Spring 2001

COMP 4300 - Computer Architecture

COMP 8700/8706 - Real-time and Embedded Computing

Fall 2000    

COMP 4300 - Computer Architecture

COMP 6720 - Real-time and Embedded Systems

Spring 2000

COMP 605 - Modern Operating Systems

Winter 2000

COMP 505 - Operating System Design Principles

Fall 1999

COMP 622 - Software Engineering II

Professional Activities

1.    Editorial Board, International J. of Comp. & Applications, Acta Press, 2003-

2.    Session Chair, HIPC 2007.

3.    Session Chair, 16th International Conference on Parallel and Distributed Systems, ISCA, 2003.

4.    Program Committee, 16th International Conference on Computer Applications in Industry and Engineering, 2003, ISCA.

5.    Session Chair, EIT Conference, Chicago, IEEE, 2000.

6.    Invited Session Chair, NPDA Conference, IASTED, 2002. 

7.    Session Chair, 27th International Conference in LCN, 2002, IEEE-ACM.

8.    Session Chair, 6th World SCI Conference 2002, Orlando, FL.

9.    Program Technical Committee, EESD Workshop, 22nd IEEE International Performance Computing and Communications Conference, 2003.

10. Member, IEEE-CS.

11. Member, ISCA.

12. Member, IEEE Task force on cluster computing

13. Panelist, NSF ITR, 2003.

14. Reviewer, IEEE TPDS, JPDC etc.

15. Participant, NSF Workshop on Network of Sensors, LA, 2004

Grants: Funded

1.    Principal Investigator:  Wireless Techniques in Architecture and Fault Tolerance, National Science Foundation, 2004-2006.

2.    Principal Investigator:  Scheduling in Computational Grids, National Science Foundation, 2004-2005.

3.    Principal Investigator:  Embedded Networks and Real-Time and Embedded Computing, $1,440,000, Wind River Systems, Software in-kind grant, 2003-2008.

4.    Principal Investigator:  Competitive Research Grant, Auburn University, $10,000, 2002-2003

5.    Principal Investigator:  IRSC Grant, Auburn University, $20,000, 2000-2001.

6.    Principal Investigator:  Research Initiation Award; College of Engineering, Auburn University, 1999-2000.

7.    Principal Investigator:  Faculty Research and Creative Support Award, $5,000, Western Michigan University, Kalamazoo, MI, 1998-99.

8.    Principal Investigator:  Graduate Student Support Award, $5,000, NASA/MSGC, 1997-1998.

9.    Principal Investigator:  Research Development Award, $1,250, Western Michigan University, Kalamazoo, MI, 1997-1998.

10. Co- Principal Investigator:  Mentor Graphics Software Equipment Grant, Mentor Graphics, 1998.

Sample Books/Manuscripts Reviewed

·      Computer Architecture and Assembly Language, Scott Jones

·      Computer Architecture, Prentice Hall