EE523 Assignment #3

Due: Friday, November 1.

Design a digital logic circuit that, when it receives a START pulse, will multiply two 5-bit "sign-magnitude" format numbers, producing a 9-bit sign-magnitude format product. (See Example 8.20 on pages 551-552 of the text.)

Computation:

P(8:0) = M(4:0) x Q(4:0)

P(8),M(4),Q(4) are sign bits (0=plus, 1=minus)

P(7:0),M(3:0),Q(3:0) are 8/4-bit binary absolute values (magnitudes)

Multiplication Algorithm:

Implement an "add-and-shift" algorithm (4 iterations).

External controller inputs and outputs:

Notes: Final P(8:0) should remain on the outputs until a new START pulse is received. You may add a RESET input to simulate "power on".

Component Library:

Use logic gates and MSI modules from the 74LS library (ls_lib).

Items to turn in:

  1. Two schematics: controller and top-level circuit
  2. Two simulation listings, one for each schematic.
  3. State/ASM diagram, state table, excitation tables, etc. for design of controller.

Hand-annotate your simulation listings to highlight "significant events" - including start pulses, input values, and partial/final products.

Schematic #1: Controller circuit

Schematic #2: Top-level design (datapath plus controller)

(+5) x (+6), (-13) x (-9), (+14) x (-3)